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NOIV1SN025KA
Table 34. REGISTER MAP
Default
Address Offset
Address
Bit Field
Register Name
Hex
Default
Description
Access
[7:0]
reserved
0x00
0
Reserved
Ser/lvds/io [Block Offset: 112]
0
112
[0]
power_down
clock_out_pwd_n
0x0000
0x0
0
0
Power down for Clock Output.
RW
‘0’ =powered down,
‘1’ = powered up
[1]
sync_pwd_n
0x0
0
Power down for Sync channel
‘0’ = powered down,
‘1’ = powered up
[2]
data_pwd_n
0x0
0
Power down for data channels
(4 channels)
‘0’ = powered down,
‘1’ = powered up
Data Block [Block Offset: 128]
0
128
[7:0]
[10:8]
blackcal
black_offset
black_samples
0x4008
0x08
0x0
16392
8
0
Desired black level at output
Black pixels taken into ac-
count for black calibration.
RW
Total samples =
2**black_samples
[14:11]
[15]
reserved
crc_seed
0x8
0x0
8
0
Reserved
CRC Seed
‘0’ = All-0
‘1’ = All-1
1
129
[0]
[9:1]
[10]
[11]
[12]
[13]
general_configuration
auto_blackcal_enable
blackcal_offset
blackcal_offset_dec
reserved
reserved
8bit_mode
0xC001
0x1
0x00
0x0
0x0
0x0
0x0
49153
1
0
0
0
0
0
Automatic blackcalibration is
enabled when 1, bypassed
when 0
Black Calibration offset used
when auto_black_cal_en = ‘0’.
blackcal_offset is added when
0, subtracted when 1
Reserved
Reserved
Shifts window ID indications
by 4 cycles.
RW
‘0’ = 10 bit mode, ‘1’ = 8 bit
mode
[15:14]
reserved
0x3
3
Reserved
2
3
130
131
[9:0]
[10]
trainingpattern
trainingpattern
reserved
sync_code0
0x03A6
0x3A6
0x0
0x002A
934
934
0
42
Training pattern sent on Data
channels during idle mode.
This data is used to perform
word alignment on the LVDS
data channels.
Reserved
RW
RW
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